Brain Computer Interface: EEG Signal Processing

Brain Computer Interface: EEG Signal Processing discusses electroencephalogram (EEG) signal processing using effective methodology and algorithms. This book provides a basic introduction to EEG and a classification of different components present in EEG. It also helps the reader to understand the scope of processing EEG signals and their associated applications. Further, it covers specific aspects such as epilepsy detection; exploitation of P300 for various applications; design of an EEG acquisition system; and detection of saccade, fix, and blink from EEG and EOG data.

Key Features:

• Explains the basis of brain computer interface and how it can be established using different EEG signal characteristics
• Covers the detailed classification of different types of EEG signals with respect to their physical characteristics
• Explains detection and diagnosis of epileptic seizures from the EEG data of a subject
• Reviews the design and development of a low-cost and robust EEG acquisition system
• Provides mathematical analysis of EEGs, including MATLAB(R) codes for students to experiment with EEG data

This book is aimed at graduate students and researchers in biomedical, electrical, electronics, communication engineering, healthcare, and cyber physical systems.

Narayan Panigrahi, Received his MSc (Computer Science) from J.K.Institute of Technology, University of Allahabad, M.Tech(Computer Science and Data Processing), IIT, Kharagpur and PhD from IIT, Bombay in the year 1990, 1999 and 2012 respectively. He is the best graduate of Berhampur University, Odisha in the year 1987. He started as a research scientist in the Institute for System Studies and Analysis (ISSA), New Delhi in the year 1991. He initiated research and development of modeling and visualization of terrain. Currently, he is serving as a scientist in Center for Artificial Intelligence and Robotics (CAIR) a DRDO Laboratory in Bangalore India. He leads a team of scientist to design and develop Geographical Information System comprising of topography, bathymetry and space navigation. He has researched the algorithmic aspect of Remote Sensing, spatio-temporal science and GIS. He has initiated in communication of science through authoring of various books in different languages. He has authored Geographic Information Science (GISc) and Computations in GIS which are being taught in different academic circle. He has been awarded the ＂National Geospatial Award for Excellence 2019＂ from ISRS (Indian Society for Remote Sensing), DRDO Performance Excellence Award 2012, Laboratory Technology Award for 2010, 2014, 2017 and 2019 respectively. Authored seven books, 69 international research papers and 6 patents. Two of his research papers were awarded best research award by INRIA, France and IEEE, Computer Society. Guided more than 40 graduate and undergraduate engineering students. He is a plenary and invited speaker in many international conferences and has chaired technical session.
Saraju P. Mohanty received B. Tech. (Honors) in electrical engineering from the Orissa University of Agriculture and Technology, Bhubaneswar, in 1995, the master’s degree in Systems Science and Automation from the Indian Institute of Science, Bengaluru, in 1999, and the Ph.D. degree in Computer Sci- ence and Engineering from the University of South Florida, Tampa, in 2003. He is a Professor with the University of North Texas. His research is in ＂Smart Electronic Systems＂ which has been funded by National Science Foundations (NSF), Semiconductor Research Corporation (SRC), U.S. Air Force, IUSSTF, and Mission Innovation. He has authored 350 research articles, 4 books, and invented 4 granted and 1 pending patents. His Google Scholar h-index is 38 and i10-index is 147 with 6600 citations. He is regarded as a visionary researcher on Smart Cities technology in which his research deals with security and energy aware, and AI/ML-integrated smart components. He introduced the Secure Digital Camera (SDC) in 2004 with built-in security features designed using Hardware-Assisted Security (HAS) or Security by Design (SbD) principle. He is widely credited as the designer for the first digital watermarking chip in 2004 and first the low-power digital watermarking chip in 2006. He is a recipient of 12 best paper awards, Fulbright Specialist Award in 2020, IEEE Consumer Technology Society Outstanding Service Award in 2020, the IEEE-CS-TCVLSI Distinguished Leadership Award in 2018, and the PROSE Award for Best Textbook in Physical Sciences and Mathematics category in 2016. He has delivered 10 keynotes and served on 9 panels at various International Conferences. He has been serving on the editorial board of several peer-reviewed international journals. He has mentored 2 post-doctoral researchers, and supervised 12 Ph.D. dissertations, 26 M.S. theses, and 10 undergraduate projects.